Power semiconductor components, such as, for example, power diodes, power MOSFETs (Metal Oxide Semiconductor Field Effect Transistors), power IGBTs (Insulated Gate Bipolar Transistors) or power thyristors, have been developed to withstand high reverse voltages. Such power components comprise a pn junction formed between a p-doped semiconductor zone and an n-doped semiconductor zone. The component is in the off state (is switched off) if the pn junction is reverse-biased. In this case, a depletion zone or space charge zone propagates in the p-doped and n-doped zones. Usually, one of said semiconductor zones is more lightly doped than the other of said semiconductor zones, with the result that the depletion zone propagates principally in the more lightly doped zone, which principally accepts the voltage present across the pn junction.
In the case of vertical power semiconductor components, terminals for applying an electrical voltage to the pn junction are usually arranged on opposite sides of a semiconductor body in which the pn junction is integrated. In this case, the semiconductor body comprises an inner region (an inner zone), in which the pn junction is arranged, and an edge region (an edge zone), which surrounds the inner region in a ring-shaped fashion. With the component in the off state, the equipotential lines of the electric field in the inner region run substantially parallel to a front side and a rear side of the semiconductor body i.e. the electric field lines run perpendicular to the front and rear sides, while the equipotential lines in the edge region emerge from the semiconductor body in the region of one of the front and rear sides. In many cases it is desirable to achieve in the edge region of the component a dielectric strength which corresponds at least to the dielectric strength in the inner region. On account of the equipotential lines emerging from the semiconductor body in the edge region, i.e. on account of the electric field lines running parallel to the surface in the edge region, the dielectric strength of the component can be adversely influenced by parasitic effects in the region of the surface of the semiconductor body, such as e.g. free bonds of the semiconductor atoms of the semiconductor body. In principle, these effects can be reduced by providing a passivation on the surface of the semiconductor body in the edge region. This is described for example in B. Jayant Baliga: “Fundamentals of Power Semiconductor Devices”, Springer Verlag, 2008, ISBN 978-0-387-47313-0, pages 125-155.
One suitable material for a passivation layer is a semiconductor oxide for example. However, even under optimum production conditions in an extremely clean atmosphere, contaminations of the passivation layer cannot completely be avoided. Such contaminations can lead to positive charges or negative charges in the passivation layer. In this regard, positive charges can be brought about for example by a contamination with alkali metal ions, such as, for example, sodium (Na) ions or potassium (K) ions, and negative charges can be brought about for example by a contamination with hydroxide ions (OH−). Under the influence of high electric fields such as occur with the component in the off state, for example, said charges can be displaced or can accumulate, which can lead to an unfavorable field distribution that reduces the dielectric strength of the component in the edge region.